1. Field of the Invention
The present invention relates to a semiconductor device and manufacturing method thereof. More specifically, the present invention relates to an improvement of a structure of a semiconductor device allowing improvement in operation characteristic of the semiconductor device, and to manufacturing method thereof.
2. Description of the Background Art
A structure of a conventional semiconductor device will be described with reference to FIG. 15. Referring to FIG. 15, an element isolating oxide film 2 for defining an active region is provided on a main surface of a p type silicon substrate 1. At a position of a prescribed depth from the main surface of p type silicon substrate 1, there is provided a strip shaped p type isolation region 3. In the active region defined by element isolating oxide film 2, an nMOS (Metal Oxide Semiconductor) 100 is formed.
The nMOS 100 has a gate oxide film 4, a gate electrode 5 and a pair of n type source/drain regions 6. The pair of n type source/drain regions 6 are provided on both sides of gate electrode 5. Upper and side surfaces of gate electrode 5 and surfaces of the pair of n type source/drain regions 6 are covered by an oxide film 7, and oxide film 7 is covered by an interlayer oxide film 8.
A bit line 9 is connected to one of the pair of n type source/drain regions 6. Bit line 9 and interlayer oxide film 8 are covered by an interlayer oxide film 10.
On a lower surface of element isolating oxide film 2, an impurity region 12 is provided connected to the other one of the pair of n type source/drain regions 6. A capacitor 200 is connected to impurity region 12 through a contact hole 10a provided piercing through element isolating oxide film 2.
Capacitor 200 has a storage node (lower electrode) 13 directly connected to impurity region 12, a capacitor dielectric film 14, and a cell plate (upper electrode) 15. Capacitor dielectric film 14 and cell plate (upper electrode) 15 are provided to extend over interlayer oxide film 10.
A memory cell of a DRAM (Dynamic Random Access Memory) is formed by nMOS 100 and capacitor 200 described above.
In order to meet the demand of reducing the diameter of a contact hole 15a as the semiconductor device has been miniaturized, a framing film 11 of an oxide such as TEOS (Tetra Etyle Ortho Silicate) is provided on a side wall portion of contact hole 10a. 
FIG. 16 shows an impurity concentration profile along a cross section taken along the line X of FIG. 15. Referring to FIG. 16, the line A represents concentration of an n type impurity such as phosphorus, and the line B represents concentration of a p type impurity such as boron. Here, a p type isolation region 3 has a depth of at most 0.55 xcexcm, and impurity region 12 has a depth of 0.1 xcexcm to 0.55 xcexcm.
The method of manufacturing the semiconductor device having the above described structure will be described with reference to FIGS. 17 to 25.
Referring to FIG. 17, element isolating oxide film 2 is formed on the main surface of p type silicon substrate 1 by LOCOS (Local Oxidation of Silicon) method or trench isolation method. Thereafter, an n type impurity is introduced to the entire main surface of p type silicon substrate 1 to form the strip shaped p type isolation region 3.
Referring to FIG. 18, by photo lithography and etching, gate oxide film 4 and gate electrode 5 having prescribed shapes are formed. Thereafter, referring to FIG. 19, using gate electrode 5 as a mask, an n type impurity is introduced to the main surface of p type silicon substrate 1, to form a pair of n type source/drain regions 6.
Then, referring to FIG. 20, oxide film 7 is formed to cover the upper and side surfaces of gate electrode 5 and the surfaces of the pair of n type source/drain regions 6. Further, interlayer oxide film 8 is formed to cover oxide film 7.
Referring to FIG. 21, a contact hole reaching one of the pair of n type source/drain regions 6 is formed in interlayer oxide film 8, and thereafter bit line 9 formed of a conductive layer connected to one of the pair of n type source/drain regions 6 is formed.
Thereafter, referring to FIG. 22, interlayer oxide film 10 is formed to cover interlayer oxide film 8 and bit line 9, and by photo lithography and etching, contact hole 10a passing through interlayer oxide film 10, interlayer oxide film 8, oxide film 7 and element isolating oxide film 2 to reach silicon substrate 1 is formed.
Thereafter, referring to FIG. 23, using contact hole 10a, a n type impurity is introduced to p type silicon substrate 1 to form impurity region 12 which is connected to p type isolation region 3 as well as to the other one of the pair of n type source/drain regions 6.
Introduction of an n type impurity at this time is performed with implantation energy of 100 keV to 200 keV and the dose of 1xc3x971013 cmxe2x88x922 to 1xc3x971014 cmxe2x88x922. As a result, impurity region 12 comes to have the impurity concentration of about 3xc3x971017 cmxe2x88x923 to 3xc3x971018 cmxe2x88x923.
Referring to FIG. 24, framing film 11 of an oxide film such as TEOS, is formed to cover an inner portion of contact hole 10a. Then, referring to FIG. 25, framing film 11 on the bottom portion of contact hole 10a and on interlayer oxide film 10 is removed, so as to leave framing film 11 only on the side wall portion of contact hole 10a. Thereafter, in order to remove a natural oxide film formed on the surface of p type silicon substrate 1 exposed at the bottom of contact hole 10a, washing by hydrofluoric acid is performed.
Thereafter, storage node (lower electrode) 13 directly connected to impurity region 12, capacitor dielectric film 14 and cell plate (upper electrode) 15 are formed, and thus a memory cell structure of a DRAM having nMOS 100 and capacitor 200 shown in FIG. 15 is completed.
In the semiconductor device having the above described structure, however, washing with hydrofluoric acid is performed to remove the natural oxide film formed on the p type silicon substrate 1 exposed at the bottom of contact hole 10a, as described above. At this time, framing film 11 of an oxide film such as TEOS provided on the side wall portion of contact hole 10a is etched by the hydrofluoric acid. As a result, framing film 11 is reduced in thickness, resulting in an enlarged diameter of contact hole 10a. 
Therefore, an object of the present invention is to provide a semiconductor device of which operation characteristic is stabilized by preventing enlargement of the diameter for forming inter connection layers as the semiconductor device is miniaturized, and to provide manufacturing method thereof.
According to the present invention, the semiconductor device includes a semiconductor substrate having a main surface, an element isolating region for defining an element framing region on the main surface of the semiconductor substrate, a strip shaped isolation region having a peak of impurity concentration at a prescribed depth from the main surface of the semiconductor substrate, a connection hole provided piercing through the element isolating region, a hydrofluoric acid resistant side wall film which is not etched by hydrofluoric acid (hereinafter referred to as an anti-HF side wall film) provided to cover the side wall of the connection hole, an interconnection layer provided to fill the connection hole, and an impurity region provided on the semiconductor substrate extending from a lower end portion of the connection hole toward the isolation region.
As described above, an anti-HF side wall film which is not etched by hydrofluoric acid is provided on the side wall of the connection hole, and therefore the thickness of the anti-HF side wall film is not changed even after the step of washing using hydrofluoric acid, during manufacturing of the semiconductor device. As a result, smaller diameter of the connection hole required as the semiconductor device has been miniaturized can effectively be attained.
As a preferable embodiment of the semiconductor device, a nitride film is used as the anti-HF side wall film. More preferably, the impurity region includes a first impurity region provided to connect the interconnection layer to the isolation layer, and a second impurity region provided near a lower end of the connection hole to be connected to the interconnection layer.
As the second impurity region is provided near the lower end of the connection hole, the semiconductor substrate near the lower end of the connection hole comes to have lower resistance, and hence it becomes possible to improve operation characteristic of the semiconductor device.
In the semiconductor device in accordance with a preferred embodiment, the anti-HF side wall film is either a polysilicon film or an amorphous silicon film.
As the polysilicon film and the amorphous silicon film are conductive, a trap, which is generated at the semiconductor substrate when the first impurity region reaching the isolation region from the lower end of the connection hole is formed, does not present any problem.
The method of manufacturing the semiconductor device in accordance with the present invention includes the following steps.
First, an element isolating region for defining an element framing region is formed in a semiconductor substrate having a main surface. Thereafter, an impurity is introduced to the entire surface of the semiconductor substrate, and a strip-shaped isolation region having peak impurity concentration at a prescribed depth position from the main surface of the semiconductor substrate is formed.
Thereafter, a connection hole piercing through the element isolating region is formed. Then, an anti-HF side wall film which is not etched by hydrofluoric acid, is formed covering the side wall of connection hole at least near the lower end of the connection hole.
Then, an impurity is introduced to the semiconductor substrate through the connection hole, whereby a first impurity region reaching the isolation region from the lower end of the connection hole is formed. Thereafter, inner portion of the connection hole is washed by hydrofluoric acid. Then, an interconnection layer is formed to fill the inside of the connection hole.
As described above, according to the method of manufacturing a semiconductor device of the present invention, even in the step of washing using hydrofluoric acid, thickness of the anti-HF side wall film is unchanged. As a result, the diameter of the connection hole is effectively reduced, as required along with the miniaturization of the semiconductor device.
Further, in a preferred embodiment of the manufacturing method of the semiconductor device, in the step of forming the anti-HF side wall film, either polysilicon film or an amorphous silicon film is formed. When such a film is used, the thickness of the anti-HF side wall film is unchanged even in the step of washing using hydrofluoric acid. Further, since these films are conductive, the trap generated in the semiconductor substrate when the first impurity region reaching the isolation region from the lower end of the connection hole is formed does not present any problem.
In the preferred embodiment, in the step of forming the anti-HF side wall film, a nitride film is formed, and before the anti-HF side wall film is formed on the side wall of the connection hole, an impurity is introduced to the semiconductor substrate through the connection hole, whereby a second impurity region is formed near the lower end of the connection hole. The thickness of the anti-HF side wall film is unchanged in the step of washing using hydrofluoric acid also in this example using nitride film.
As to the trap generated in the semiconductor substrate when the first impurity region is formed from the lower end of the connection hole to the isolation region, the trap does not present any problem, as the second impurity region is formed near the lower end of the connection hole. Further, as the second impurity region is provided near the lower end of the connection hole, the semiconductor substrate near the lower end of the connection hole comes to have lower resistance, and hence operation characteristic of the semiconductor device can be improved.